SPHBM4: JEDEC’s Answer to Memory’s Mid-Market Gap

JEDEC, the organization responsible for defining specifications of standard memory types, is nearing the completion of the SPHBM4 development-a new memory standard that can be described as a cost-effective version of HBM4. The new memory is expected to deliver the full bandwidth of HBM4 class memory with a narrow 512-bit interface. Additionally, it aims to offer greater capacity and reduced integration costs through compatibility with traditional organic substrates.

Indeed, the use of organic substrates is one of the methods of cost reduction. Compared to silicon, tracing on an organic substrate allows for the creation of longer electrical channels between SoC and memory stacks, which potentially reduces layout constraints in larger packages and enables more memory to be placed near the chip. If this memory gains widespread adoption, it will fill the gaps existing between conventional HBM and GDDR.

SPHBM operates with the same overall data bandwidth as HBM4, using fewer contacts through a higher frequency. Where the HBM4 interface has 2048 data signals, SPHBM4 will define 512 data signals with 4:1 serialization to achieve the same bandwidth upon publication. Since SPHBM4 uses the same core memory layers as HBM4, the total memory capacity per stack remains identical. However, an added advantage of tracing on an organic substrate is the longer supported channel length from the SoC to memory, potentially increasing the total number of SPHBM stacks and thus, the overall memory capacity.